Cloud computing, wireless base stations, smartphones, video, medical imaging, advanced computer graphics and many other applications are computation-intensive and often require multi-core (and/or multi-processor) solutions to match system-required high-processing throughput.
Therefore size efficient multi-core architectures are highly desirable to reduce solution cost and power consumption. Available multi-core solutions are currently based on duplicating (repetition) serial processors in order to meet system processing throughput requirements. These implementation methods are typically memory-size inefficient and have larger-than-needed processing units.